MURAL - Maynooth University Research Archive Library



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    Burke, K. and Power, J.A. and Donnellan, Brian and Moloney, K. and Lane, W.A. (1994) Worst-case MOSFET parameter extraction for a 2 /spl mu/m CMOS process. In: Proceedings of 1994 IEEE International Conference on Microelectronic Test Structures. IEEE, pp. 119-125. ISBN 0780317572

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