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    Design Technique of Broadband CMOS LNA for DC-11GHz SDR


    Tuan-Phan, Anh and Farrell, Ronan (2010) Design Technique of Broadband CMOS LNA for DC-11GHz SDR. IEICE Transactions on Electronics , 7 (3). pp. 190-196. ISSN 0916-8524

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    Abstract

    This paper presents a DC-11GHz CMOS low noise amplifier (LNA) for software-defined radio (SDR). The broadband performance is extended to cover the spectrum from near DC to 11GHz by adopting extra inductors with modified resistive feedback, folded current reuse topology. Bandwidth extension is proposed by inserting pole splitting, interstage and LC ladder inductors. A source follower jointly acts as the buffer stage for broadband output matching and feed-forward path for gain enhancement as well as noise cancellation. Simulation shows power gain of 11 ±4dB and the NF ranging from 1.8 to 3dB in 0.4-11GHz band. The LNA achieves an average IIP3 of -10dBm while consumes only 5.3mW. The proposed broadband LNA is designed in 0.18-µm CMOS process from 1.5V supply.

    Item Type: Article
    Keywords: LNA; broadband; software-defined radio; low power; CMOS;
    Academic Unit: Faculty of Science and Engineering > Electronic Engineering
    Item ID: 3684
    Depositing User: Dr. Ronan Farrell
    Date Deposited: 28 May 2012 12:00
    Journal or Publication Title: IEICE Transactions on Electronics
    Publisher: Institute of Electronics, Information and Communication Engineers
    Refereed: Yes
    URI:

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