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    Methodology for Mismatch Reduction in Time-Interleaved ADCs

    Soudan, Michael and Farrell, Ronan (2007) Methodology for Mismatch Reduction in Time-Interleaved ADCs. In: Proceedings of 2007 European Conference on Circuit Theory and Design, 26th - 30th August 2007, Sevilla, Spain.

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    This paper presents a methodology to minimize mismatch errors in time-interleaved analog-to-digital converters (ADC) by means of averaging multiple channels. A simple algorithm improving both spurious free dynamic range (SFDR) and signal-to-noise and distortion ratio (SINAD) is demonstrated. The presented technique provides robustness against inaccurately identified mismatch errors and does not require computationally expensive post-processing of the signal.

    Item Type: Conference or Workshop Item (Paper)
    Additional Information: Copyright Notice "©2007 IEEE. Reprinted from Proceedings of 2007 European Conference on Circuit Theory and Design Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE."
    Keywords: Analogue-digital conversion; Analog-to-digital converters; Mismatch reduction; Signal-to-noise and distortion ratio; Spurious free dynamic range; Time-interleaved ADC.
    Academic Unit: Faculty of Science and Engineering > Electronic Engineering
    Item ID: 1343
    Depositing User: Ronan Farrell
    Date Deposited: 25 May 2009 15:58
    Refereed: Yes
    Use Licence: This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here

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