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    Methodology for Minimizing Mismatches in Time-Interleaved ADCs

    Zanini, Francesco and Mickael, Soudan and Farrell, Ronan (2007) Methodology for Minimizing Mismatches in Time-Interleaved ADCs. In: 15th IMEKO TC4 International Symposium and the 12th Workshop on ADC Modelling and Testing, 18-22 September 2007, Iaşi, Romania.

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    This presentation describes a technique mitigating the impact of timing mismatches in timeinterleaved analog-to-digital converters (ADCs). The systems signal-to-noise and distortion ratio (SINAD) and spurious-free dynamic range (SFDR) are increased by controlling the selection order of the channels ADCs in combination with oversampling and consecutive filtering. The proposed method requires only knowledge of the relative level of timing mismatch between the channel ADCs though not the precise magnitude of the mismatch. The impact of timing mismatch on the SINAD and advanced selection ordering schemes are discussed. Moreover, simulation results are presented comparing the figures of merit of existing techniques.

    Item Type: Conference or Workshop Item (Other)
    Keywords: time-interleaved ADC (TIADC); ADC; Mismatch correction;
    Academic Unit: Faculty of Science and Engineering > Electronic Engineering
    Faculty of Science and Engineering > Research Institutes > Institute of Microelectronics and Wireless Systems
    Item ID: 741
    Depositing User: Francesco Zanini
    Date Deposited: 17 Oct 2007
    Refereed: Yes
      Use Licence: This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here

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