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    Hardware and latency optimisation for 5G digital pre-distortion


    Byrne, Declan and Farrell, Ronan and Dooley, John (2019) Hardware and latency optimisation for 5G digital pre-distortion. In: 2019 30th Irish Signals and Systems Conference (ISSC). IEEE. ISBN 9781728128009

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    Abstract

    In modern radio frequency (RF) transceivers the power amplifier (PA) is a central component in terms of power consumption. Achieving efficient performance in this component results in the PA output signal becoming distorted. Linearisation can be performed using techniques such as Digital Pre-Distortion (DPD). The pre-distorter operation of a DPD system involves the constant computation of a distorted signal to ensure linear operation of the nonlinear power amplifier. In this work a novel polynomial evaluation scheme is proposed to optimise the pre-distorter operation within a DPD system. Improvements to latency and hardware requirements are possible with new techniques. Validation of the proposed design was conducted using FPGA implementations and compared to incumbent pipelined solutions for both low latency and hardware efficiency. The proposed method indicated hardware savings of 67.8%, while operating 58.7% faster, compared to an existing implementation.

    Item Type: Book Section
    Additional Information: Funding: This publication has emanated from research conducted with the financial support of Science Foundation Ireland (SFI) and is co-funded under the European Regional Development Fund under Grant Number 13/RC/2077. Cite as: D. Byrne, R. Farrell and J. Dooley, "Hardware and Latency Optimisation for 5G Digital Pre-Distortion," 2019 30th Irish Signals and Systems Conference (ISSC), Maynooth, Ireland, 2019, pp. 1-6, doi: 10.1109/ISSC.2019.8904959.
    Keywords: digital pre-distortion; polynomial evaluation; 5G; FPGA; DSP;
    Academic Unit: Faculty of Science and Engineering > Electronic Engineering
    Faculty of Science and Engineering > Research Institutes > Hamilton Institute
    Item ID: 14204
    Identification Number: https://doi.org/10.1109/ISSC.2019.8904959
    Depositing User: Ronan Farrell
    Date Deposited: 18 Mar 2021 15:59
    Publisher: IEEE
    Refereed: Yes
    Funders: Science Foundation Ireland (SFI), European Regional Development Fund
    URI:

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