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    Study of Linearity and Power Consumption Requirements of CMOS Low Noise Amplifiers in Context of LTE Systems and Beyond


    Szczepkowski, Grzegorz and Farrell, Ronan (2014) Study of Linearity and Power Consumption Requirements of CMOS Low Noise Amplifiers in Context of LTE Systems and Beyond. ISRN Electronics, 391240. ISSN 2090-8679

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    Abstract

    This paper presents a study of linearity in wideband CMOS low noise amplifiers (LNA) and its relationship to power consumption in context of Long Term Evolution (LTE) systems and its future developments. Using proposed figure of merit (FoM) to compare 35 state-of-the-art LNA circuits published over the last decade, the paper explores a dependence between amplifier performance (i.e., combined linearity, noise figure, and gain) and power consumption. In order to satisfy stringent linearity specifications for LTE standard (and its likely successors), the paper predicts that LNA FoM increase in the range of +0.2 dB/mW is expected and will inevitably translate into a significant increase in power consumption—a critical budget planning aspect for handheld devices, active antenna arrays, and base stations operating in small cells.

    Item Type: Article
    Keywords: Linearity; Power Consumption; CMOS; Low Noise Amplifiers; LTE Systems;
    Academic Unit: Faculty of Science and Engineering > Electronic Engineering
    Item ID: 4960
    Identification Number: https://doi.org/10.1155/2014/391240
    Depositing User: Ronan Farrell
    Date Deposited: 19 May 2014 09:58
    Journal or Publication Title: ISRN Electronics
    Publisher: Hindawi Publishing Corporation
    Refereed: Yes
    URI:
    Use Licence: This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here

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