Wu, Fangzhou
(2016)
FPGA based Uniform Channelizer
Implementation.
Masters thesis, National University of Ireland Maynooth.
Abstract
Channelizers are widely used in modern digital communication systems.
Advanced uniform multirate channelization have been theoretically proved to be
capable of reducing the computational load, with a better performance. Therefore,
in this thesis, we implement these designs on a FPGA board for the sake of the
comprehensive evaluation of resource usage, performance and frequency
response.
The uniform filter-banks are one of the most essential unit in channelization. The
Generalised Discrete Fourier Transform Modulated Filter Bank (GDFT-FB), as an
important variant of basic a DFT-FB, has been implemented in FPGA and
demonstrated with a better computational saving rather than traditional schemes.
Moreover the oversampling version is demonstrated to have a better frequency
response with an acceptable amount of extra resources. On the other hand,
frequency response masking (FRM) techniques is able to reduce the number of
coefficients. Therefore, the full FRM GDFT-FB and alternative narrowband FRM
GDFT-FB are both implemented in FPGA platform, in order to achieve a better
performance and hardware efficiency.
| Item Type: |
Thesis
(Masters)
|
| Additional Information: |
M.Sc. |
| Keywords: |
FPGA; Uniform; Channelizer; Implementation; |
| Academic Unit: |
Faculty of Science and Engineering > Electronic Engineering |
| Item ID: |
7547 |
| Depositing User: |
IR eTheses
|
| Date Deposited: |
19 Oct 2016 13:18 |
| URI: |
|
| Use Licence: |
This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available
here |
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