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Srinivasan, Prakash and Farrell, Ronan (2010) Hierarchical DFT with Combinational Scan Compression, Partition Chain and RPCT. In: IEEE Computer Society Annual Symposium on VLSI, 2010. IEEE, pp. 52-57. ISBN 9781424473212
Srinivasan, Prakash and Farrell, Ronan and Ward, Eamon (2008) Modular Scan Test for SoC Design. In: Intel European Research and Innovation Conference, 10-12 September 2008 , Leixlip, Ireland .