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Riaz, Arslan, Bansa, Vaibhav, Solomon, Amit, An, Wei, Liu, Qijun, Galligan, Kevin, Duffy, Ken R., Medard, Muriel and Yazicigil, Rabia Tugce (2021) Multi-Code Multi-Rate Universal Maximum Likelihood Decoder using GRAND. ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC). pp. 239-246. ISSN 78-1-6654-3751-6/21/
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Abstract
We present the first fully-integrated universal Max-
imum Likelihood decoder in 40 nm CMOS using the Guessing
Random Additive Noise Decoding (GRAND) algorithm for low-
power applications. The 0.83 mm2 multi-code multi-rate universal
decoder can efficiently decode any code of length up to 128 bits
with 1 μs latency at 68 MHz. Dynamic clock gating leveraging
noise statistics reduces the average power dissipation to 3.75 mW
at 1.1 V or 30.6 pJ/decoded bit with a throughput of 122.6 Mb/s.
Universal decoding reduces hardware footprint, and the design
allows seamless swapping between codebooks with no downtime,
enabling use by multiple applications without switch-over.
| Item Type: | Article |
|---|---|
| Keywords: | error correcting codes; maximum likelihood decoding; GRAND; hard-detection; universal decode; |
| Academic Unit: | Faculty of Science and Engineering > Research Institutes > Hamilton Institute |
| Item ID: | 15185 |
| Identification Number: | 10.1109/ESSCIRC53450.2021.9567867 |
| Depositing User: | Dr Ken Duffy |
| Date Deposited: | 06 Jan 2022 15:15 |
| Journal or Publication Title: | ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC) |
| Publisher: | IEEE |
| Refereed: | Yes |
| Related URLs: | |
| URI: | https://mural.maynoothuniversity.ie/id/eprint/15185 |
| Use Licence: | This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here |
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